Page 340 - 완) I MDP 프로젝트 작품 보고서(전체과 1학년)1.6

2) STM32F103VB의 기능

• Core : ARM 32-bit Cortex™-M3 CPU
• 72 MHz maximum frequency, 1.25 DMIPS/MHz(Dhrystone 2.1) performance at 0 wait

state memory access
[* DMIPS = Dhrystone Million Instructions Per Second로, 드라이스톤은 특정 작업을
수행시켜 그 결과를 정수화하여 시스템의 성능을 비교하는 단위로서, 1DMIP = 1초에
100만개의 명령어를 처리하는 능력을 의미한다.]
• Single-cycle multiplication and hardware division

• Memories
• 256 to 512 Kbytes of Flash memory
• up to 64 Kbytes of SRAM

• Flexible static memory controller with 4 Chip Select. Supports Compact Flash, SRAM,
PSRAM, NOR and NAND memories
• LCD parallel interface, 8080/6800 modes
• Clock, reset and supply management

• 2.0 to 3.6 V application supply and I/Os
• POR, PDR, and programmable voltage detector (PVD)
• 4 to 16 MHz crystal oscillator

• Internal 8 MHz factory-trimmed RC
• Internal 40 KHz RC with calibration
• 32 KHz oscillator for RTC with calibration
• Low power

• Sleep, Stop and Standby modes
• VBAT supply for RTC and backup registers
• 3 × 12-bit, 1 μs A/D converters (up to 21 channels)
• Conversion range : 0 to 3.6 V

• Triple-sample and hold capability
• Temperature sensor
• 2 × 12 bit D/A converters
• DMA : 12 channel DMA controller

• Supported peripherals : timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs
• Debug mode
• Serial Wire Debug (SWD) & JTAG interfaces

• Cortex-M3 Embedded Trace Macrocell™
• Up to 112 fast I/O ports

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