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always@(posedge clk, negedge reset)
if(!reset) begin
scan_cnt <= 0;
clk_200hz <= 1'b0;
end
else begin
if(scan_cnt >= 250000) begin
scan_cnt <= 0;
clk_200hz <= 1'b1;
end
else begin
scan_cnt <= scan_cnt+1;
clk_200hz <= 1'b0;
end
end

// FND 선택 신호 만들기(200Hz)
always@(posedge clk, negedge reset)
if(!reset) digit <= 1'b0;
else begin
if(clk_200hz == 1'b1) digit <= (digit+1)%2;
else digit <= digit;
end

// 숫자 자리 나누는 구문
assign num10 = (tim/10)%10;
assign num1 = (tim/1)%10;

// FND 선택 신호 만들기
always@(digit)
case(digit)
0: begin fnd_sel <= 2'b01; fnd_num <= num1; end
1: begin fnd_sel <= 2'b10; fnd_num <= num10; end
default: begin fnd_sel <= 2'b00; fnd_num <= 0; end
endcase

// FND mux 회로
always@(fnd_num)
case(fnd_num)
0: fnd_data <= 7'b100_0000;
1: fnd_data <= 7'b111_1001;
2: fnd_data <= 7'b010_0100;
3: fnd_data <= 7'b011_0000;
4: fnd_data <= 7'b001_1001;

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