Page 200 - MDP2020-2
P. 200

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                                                start  =  0;
                                                oe  =  0;
                                              end
                  endcase
                end
                always@(posedge  clk,  negedge  rst)
                begin
                  if(!rst)
                      begin
                      adc_out  <=  0;
                    end
                    else
                    begin
                        adc_out  <=  (state  ==  s_CAPTURE)?  adc_in  :  adc_out;
                      end
                end
            endmodule


            //----lcd-------
            module  lcd(clk,  rst,  lcd_rs,  lcd_rw,  lcd_en,  lcd_data,  data);
              input  clk,  rst;
              input  [5:0]  data;
              output  reg  lcd_rs;
              output  reg  lcd_en;
              output  lcd_rw;
              output  reg  [7:0]  lcd_data;


              reg  [2:0]  state;
              reg  [18:0]  clk_cnt;


              reg  [4:0]  cnt_100ms;
              reg  [8:0]  cnt_20ms;
              reg  [5:0]  cnt_line;


              parameter  delay_100ms  =  0;  //100ms
              parameter  function_set  =  1;
              parameter  display_on  =  2;
              parameter  display_clear  =  3;
              parameter  entry_mode  =  4;
              parameter  display_data  =  5;
              parameter  delay_20ms  =  6;          //20ms

              parameter  DIV  =  250000;            //200Hz(5ms)


              assign  lcd_rw  =  1'b0;
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