Page 839 - 완) I MDP 프로젝트 작품 보고서(전체과 1학년)1.6

delay(2); /* Delay 50 ms*/
wr_reg(0x12, 0x0139); /* VREG1OUT voltage*/
delay(2); /* Delay 50 ms*/
wr_reg(0x13, 0x1D00); /* VDV[4:0] for VCOM amplitude*/
wr_reg(0x29, 0x0013); /* VCM[4:0] for VCOMH*/
delay(2); /* Delay 50 ms*/
wr_reg(0x20, 0x0000); /* GRAM horizontal Address*/
wr_reg(0x21, 0x0000); /* GRAM Vertical Address*/

/*Adjust the Gamma Curve -------------------*/
wr_reg(0x30, 0x0006);
wr_reg(0x31, 0x0101);
wr_reg(0x32, 0x0003);
wr_reg(0x35, 0x0106);
wr_reg(0x36, 0x0B02);
wr_reg(0x37, 0x0302);
wr_reg(0x38, 0x0707);
wr_reg(0x39, 0x0007);
wr_reg(0x3C, 0x0600);
wr_reg(0x3D, 0x020B);

/* Set GRAM area --------------------*/
wr_reg(0x50, 0x0000); /* Horizontal GRAM Start Address*/
wr_reg(0x51, (HEIGHT-1)); /* Horizontal GRAM End Address*/
wr_reg(0x52, 0x0000); /* Vertical GRAM Start Address*/
wr_reg(0x53, (WIDTH-1)); /* Vertical GRAM End Address*/
wr_reg(0x60, 0x2700); /* Gate Scan Line*/
wr_reg(0x61, 0x0001); /* NDL,VLE, REV */
wr_reg(0x6A, 0x0000); /* Set scrolling line */

/* Partial Display Control -----------------*/
wr_reg(0x80, 0x0000);
wr_reg(0x81, 0x0000);
wr_reg(0x82, 0x0000);
wr_reg(0x83, 0x0000);
wr_reg(0x84, 0x0000);
wr_reg(0x85, 0x0000);

/* Panel Control ------------------*/
wr_reg(0x90, 0x0010);
wr_reg(0x92, 0x0000);

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