Page 842 - 완) I MDP 프로젝트 작품 보고서(전체과 1학년)1.6

wr_reg(0x0020,0x0000);

wr_reg(0x0021,0x0000);

/* Panel Control -----------------*/
wr_reg(0x90, 0x0010);
wr_reg(0x92, 0x0000);
wr_reg(0x93, 0x0003);
wr_reg(0x95, 0x0110);
wr_reg(0x97, 0x0000);
wr_reg(0x98, 0x0000);

/* Set GRAM write direction and BGR = 1
I/D=10 (Horizontal : increment, Vertical : increment)
AM=1 (address is updated in vertical writing direction) */
wr_reg(0x03, 0x1038);
// wr_reg(0x03, 0x1018);

wr_reg(0x07, 0x0173); /* 262K color and display ON*/
}
else if(DeviceCode==0x8999)
{
//************* Start Initial Sequence **********//
wr_reg(0x00, 0x0001); // Start internal OSC.
wr_reg(0x01, 0x3B3F); // Driver output control,
RL=0;REV=1;GD=1;BGR=0;SM=0;TB=1
wr_reg(0x02, 0x0600); // set 1 line inversion
//************* Power control setup ************/
wr_reg(0x0C, 0x0007); // Adjust VCIX2 output voltage
wr_reg(0x0D, 0x0006); // Set amplitude magnification of VLCD63
wr_reg(0x0E, 0x3200); // Set alternating amplitude of VCOM
wr_reg(0x1E, 0x00BB); // Set VcomH voltage
wr_reg(0x03, 0x6A64); // Step-up factor/cycle setting
//************ RAM position control **********/
wr_reg(0x0F, 0x0000); // Gate scan position start at G0.
wr_reg(0x44, 0xEF00); // Horizontal RAM address position
wr_reg(0x45, 0x0000); // Vertical RAM address start position
wr_reg(0x46, 0x013F); // Vertical RAM address end position
// ----- Adjust the Gamma Curve ------//
wr_reg(0x30, 0x0000);

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