Page 208 - MDP2020-2
P. 208

|    인천전자마이스터고등학교  ·············································································································
            202


                          column2  :  begin
                                                        case  (key_row)
                                                          4'b0001  :  key_data  <=  {4'b0010,  i};  //key_2
                                                          4'b0010  :  key_data  <=  {4'b0101,  i};  //key_5
                                                          4'b0100  :  key_data  <=  {4'b1000,  i};  //key_8
                                                          4'b1000  :  key_data  <=  {4'b0000,  i};  //key_0
                                                      endcase
                                                    end
                          column3  :  begin
                                                        case  (key_row)
                                                          4'b0001  :  key_data  <=  {4'b0011,  i};  //key_3
                                                          4'b0010  :  key_data  <=  {4'b0110,  i};  //key_6
                                                          4'b0100  :  key_data  <=  {4'b1001,  i};  //key_9
                                                          4'b1000  :  key_data  <=  {4'b1111,  i};  //key_#
                                                      endcase
                                                    end
                          column4  :  begin
                                                        case  (key_row)
                                                          4'b0001  :  key_data  <=  {4'b1010,  i};  //key_A
                                                          4'b0010  :  key_data  <=  {4'b1011,  i};  //key_B
                                                          4'b0100  :  key_data  <=  {4'b1100,  i};  //key_C
                                                          4'b1000  :  key_data  <=  {4'b1101,  i};  //key_D
                                                      endcase
                                                    end
                      endcase
                      end
                end

              always  @(posedge  clk,  negedge  rst)
                begin
                  if(!rst)
                      begin
                        i  <=  0;
                      end
                    else
                      begin
                        case  (key_row)
                          4'b0001  :  i  =  i  +  1;
                            4'b0010  :  i  =  i  +  1;
                            4'b0100  :  i  =  i  +  1;
                            4'b1000  :  i  =  i  +  1;
                        endcase
                    end
                end
              //assign  led  =  ~key_data;
            endmodule


            module  serial(clk,  rst,  tx_out,  uart_rxd);
   203   204   205   206   207   208   209   210   211   212   213