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9. 소프트웨어 작성하기
가. FPGA
1) 상위 모듈 (Smart_Elevator)
module Smart_Elevator(clk, reset, mo, mo2, lm_bot, lm_top, lm_mid, fnd_data, one, two, three,
oneu, twou, twod, threed ,yellow, green, red, rxd, txd, led, weight_sw);
input clk,reset;
input lm_top,lm_bot,lm_mid;
input one,two,three;
input oneu,twou,twod,threed;
input rxd;
input [3:0] weight_sw;

output [1:0]mo,mo2;
output yellow,green,red;
output [7:0]fnd_data;
output txd;
output [7:0]led;

wire [1:0] cf;
wire [7:0] rx_data;

elevator U1(clk, reset, mo, mo2, lm_bot, lm_top, lm_mid, fnd_data, one, two, three,
oneu, twou, twod, threed, yellow, green, red, led, cf, rx_data, weight_sw);
rx_tx U2 (clk, reset, rxd, txd,led,cf,rx_data);

endmodule

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