Page 181 - 3-2
P. 181

else if(~top_idle & top_cnt_max & top_state==1) begin cf<=2'b11; end
                            else cf<=cf;
                    end
            end
            end




            ///////////////////////////////////  버튼 리바운싱
            reg one_state;
            reg one_up;


            reg one_sync_0;
            always @(posedge clk) one_sync_0<=~one;
            reg one_sync_1;
            always @(posedge clk) one_sync_1<=one_sync_0;


            reg [15:0] one_cnt;


            wire one_idle = (one_state==one_sync_1);
            wire one_cnt_max = &one_cnt;


            always @(posedge clk)
            if(one_idle)
                    one_cnt<=0;
            else
            begin
                    one_cnt<=one_cnt+16'd1;
                    if(one_cnt_max) one_state<=~one_state;
            end




            reg two_state;
            reg two_up;


            reg two_sync_0;
            always @(posedge clk) two_sync_0<=~two;
            reg two_sync_1;
            always @(posedge clk) two_sync_1<=two_sync_0;


            reg [15:0] two_cnt;


            wire two_idle = (two_state==two_sync_1);
            wire two_cnt_max = &two_cnt;


            always @(posedge clk)


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